This invention relates generally to microcomputeror microprocessor-based systems and is specifically directed to the detection of abnormal operating conditions in a microcomputer/microprocessor-based system and to the initiation of normal microcomputer/microprocessor operation.
When power is applied to a system incorporating a microcomputer or microprocessor, which terms are used interchangeably for purposes of the present application, the microprocessor is typically energized after a suitable time delay. This time delay allows for system stabilization in order to permit various well-defined power supply levels to be provided to the microprocessor. The microprocessor then generally executes an initialization or reset routine wherein the microprocessor program counter is set to a zero count. The microprocessor then calls out the location in its read only memory (ROM) whose address is represented by the zero count in the program counter. The contents of that memory location initiates the initialization program routine which initializes the buffer pointer and output port latches of the microprocessor. In general, this initialization routine defines and establishes the initial conditions for microprocessor operation including a resetting of its logic to an initialized condition from which subsequent operation may proceed.
To accomplish this initialization process, generally two signals are provided to the microprocessor. One input is from a power supply which provides a well-defined voltage level necessary for proper logic circuitry operation. Another input, generally termed the power on reset signal, initiates the initialization routing previously described. These two inputs are generally provided by the same source, e.g., a DC power supply. The sequence in which these two inputs are provided to the microprocessor is important in that if the power on reset signal is removed, or goes high, after the input supply voltage drops to a specified voltage characteristic of the particular microprocessor involved, microprocessor initialization will be precluded and proper microprocessor operation will not be possible. In addition, the microprocessor is very sensitive to input power transients. For example, most microprocessors are designed to operate at a nominal input voltage of 5 VDC. If theinput voltage drops below 4.5 VDC or exceeds 5.5 VDC, normal microprocessor operation will be interrupted.
Microprocessors and microcomputers include reset circuitry and/or program routines which effect the clearing of certain data from memory, the initialization of a stored program sequence, and in some cases the turnoff of certain load devices in response to a command signal generated upon application of input power to the system. In some cases, the system may provide an indication to the user of an input voltage transient or outage requiring the user to turn the system off and/or attempt to reset and restart it where the problem is suspected of only being transitory and no longer present. This approach to resuming normal microprocessor operation is unreliable and inconvenient and thus does not represent a preferred method.
A departure from the normal control routine of the microprocessor may be caused by a system malfunction other than an input power interrupt or loss. For example, faulty microprocessor operation may be due to a faulty system clock resulting in improper program execution. Thus, it is desirable to monitor the input power applied to a microprocessor as well as the execution of its program routine in order to detect and correct for departures from normal system operation. An unattended departure from the normal control routine in a microprocessor-based system may not only complicate or prevent the execution of the desired control operation, but may also in some instances pose a serious threat to the system and those operating the system or peripheral devices thereto.
The present invention is directed to the aforementioned problems by providing a single circuit for monitoring input power in a microprocessor-based system as well as the operation thereof for the purpose of initiating a microprocessor reset in the event of faulty microprocessor operation or input power interrupts.